The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed. In the course of integrated circuit evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased.
As a part of the semiconductor fabrication, a multi-layered interconnect structure that includes a plurality of conductive elements such as metal lines and vias may be formed to provide electrical interconnections for the various components for an IC. Rail structures such as power rails (e.g., voltage rails or ground rails) may be formed in one or more of the interconnect layers of the interconnect structure. However, due to electromigration concerns, the rail structures may need to be formed to be sufficiently wide. The minimum width of the rail structures needed may unnecessarily enlarge the size of circuit cells that contain the rail structures, for example a CMOS cell. Consequently, the IC chip may not achieve a compact size or a desired circuit density.
Therefore, while existing rail structures (and the fabrication thereof) on ICs have been generally adequate for their intended purposes, they have not been entirely satisfactory in every aspect.